SN65MLVD047 Datasheet | Texas Instruments

FEATURES - Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates(1) Up to 200 Mbps, Clock Frequencies up to 100 MHz - Supports Multipoint Bus Architectures - Operates from a Single 3.3-V Supply - Characterized for Operation from - 40°C to 85°C - 16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) Packaging APPLICATIONS - Clock Distribution - Backplane or Cabled Multipoint Data Trans- mission in Telemunications, Automotive, Industrial, and Other puter Systems - Cellular Base Stations - Central-Office and PBX Switching - Bridges and Routers - Low-Power High-Speed Short-Reach Alternative to TIA/EIA-485(1) (1) The data rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). DESCRIPTION The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in parison to standard LVDS pliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30 Ω due to the bus terminations, as well as the capacitive load of bus interface devices. SN65MLVD047 drivers allow for operation with loads as low as 30 Ω. The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-k V ESD protection on all bus pins. LOGIC DIAGRAM (POSITIVE LOGIC) EN EN 1Y 1A 1Z 2A 2Y 2Z 3Y 3A 3Z 4Y 4A 4Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas...