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SN65MLVD048 - Quad Channel M-LVDS Receivers

Description

The SN65MLVD048 is a quad-channel M-LVDS receiver.

This device is designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which is optimized to operate at signaling rates up to 250Mbps.

Each receiver channel is controlled by a receive enable ( RE).

Features

  • Low-voltage differential 30Ω to 55Ω line receivers for signaling rates1 up to 250Mbps; Clock Frequencies up to 125MHz.
  • Type-1 receiver incorporates 25mV of input threshold hysteresis.
  • Type-2 receiver provides 100mV offset threshold to detect open-circuit and idle-bus conditions.
  • Wide receiver input common-mode voltage range,.
  • 1V to 3.4V, allows 2V of ground noise.
  • Meets or exceeds the M-LVDS standard TIA/ EIA-899 for multipoint topology.

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Full PDF Text Transcription

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SN65MLVD048 SLLS903A – DECEMBER 2009 – REVISED MARCH 2024 SN65MLVD048 Quad Channel M-LVDS Receivers 1 Features • Low-voltage differential 30Ω to 55Ω line receivers for signaling rates1 up to 250Mbps; Clock Frequencies up to 125MHz • Type-1 receiver incorporates 25mV of input threshold hysteresis • Type-2 receiver provides 100mV offset threshold to detect open-circuit and idle-bus conditions • Wide receiver input common-mode voltage range, –1V to 3.4V, allows 2V of ground noise • Meets or exceeds the M-LVDS standard TIA/ EIA-899 for multipoint topology • High input impedance when Vcc ≤ 1.
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