Download SN74AUP1G125 Datasheet PDF
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SN74AUP1G125 Description

The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable.

SN74AUP1G125 Key Features

  • 1 Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption (ICC = 0.9 µA Maximum)
  • Low Dynamic-Power Consumption (Cpd = 4 pF Typical at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typical)
  • Low Noise
  • Overshoot and Undershoot
  • Input-Disable Feature Allows Floating Input
  • Ioff Supports Partial-Power-Down Mode Operation
  • Input Hysteresis Allows Slow Input Transition and
  • Wide Operating VCC Range of 0.8 V to 3.6 V