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SN74LV74A-EP - Dual Positive-Edge-Triggered D-Type Flip-Flop

Datasheet Summary

Description

These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.

Features

  • Controlled Baseline.
  • One Assembly/Test Site, One Fabrication Site.
  • Extended Temperature Performance of.
  • 55°C to 125°C.
  • Enhanced Diminishing Manufacturing Sources (DMS) Support.
  • Enhanced Product-Change Notification.
  • Qualification Pedigree (1).
  • 2-V to 5.5-V VCC Operation.
  • Max tpd of 13 ns at 5 V.
  • Typical VOLP (Output Ground Bounce).

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Datasheet preview – SN74LV74A-EP

Datasheet Details

Part number SN74LV74A-EP
Manufacturer Texas Instruments
File Size 750.89 KB
Description Dual Positive-Edge-Triggered D-Type Flip-Flop
Datasheet download datasheet SN74LV74A-EP Datasheet
Additional preview pages of the SN74LV74A-EP datasheet.

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Full PDF Text Transcription

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www.ti.com SN74LV74A-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS696 – JANUARY 2006 FEATURES • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Extended Temperature Performance of– 55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • 2-V to 5.5-V VCC Operation • Max tpd of 13 ns at 5 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C • Supports Mixed-Mode Voltage Operation on All Ports • Ioff Supports Partial-Power-Down Mode Operation (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.
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