This dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.
| Part number | SN74LV74A-Q1 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 871.75 KB |
| Description | Dual Positive-Edge-Triggered D-Type Flip-Flop |
| Datasheet |
 SN74LV74A-Q1 Datasheet
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| Part Number | Description | Manufacturer |
|---|---|---|
| SN74LVC1G125 | high performance non-inverting buffer | UMW |
| SN74LVC1G34 | Single buffer | UMW |
| SN74L71 | AND-Gate R-S Master-Slave F-F | National Semiconductor |
| SN74L74N | Dual D-Type Flip-Flop | ETC |
| SN74LS00 | QUAD 2-INPUT NAND GATE | Motorola |
| Part Number | Description |
|---|---|
| SN74LV74A-EP | Dual Positive-Edge-Triggered D-Type Flip-Flop |
| SN74LV74A | Dual Positive-Edge-Triggered D-Type Flip-Flop |
| SN74LV74 | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| SN74LV00A | Quadruple 2-Input Positive-NAND Gates |
| SN74LV02A | Quadruple 2-Input Positive-NOR Gates |
The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.
