SN74LV74A Datasheet | Texas Instruments

Features - 1 2-V to 5.5-V VCC Operation - Maximum tpd of 8.5 ns at 5 V - Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C - Support Mixed-Mode Voltage Operation on All Ports - Ioff Supports Partial-Power-Down Mode Operation - Latch-up Performance Exceeds 250 m A Per JESD 17 - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 500-V Charged-Device Model (C101) 2 Applications - Programmable Logic Controller (PLC) - DCS and PAC: Analog Input Module - AV Receiver - Server PSU - STB, DVR, and Streaming Media (Withdraw) - Server Motherboard 3 Description These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) VQFN (14) 3.50 mm × 3.50 mm SOIC (14) 8.65 mm × 3.91 mm SOP (14) 10.30 mm × 5.30 mm SSOP (14) 6.20 mm × 5.30 mm TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data...