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SN74LVC1G10 - Single 3-Input Positive-NAND Gate

General Description

The SN74LVC1G10 performs the Boolean function Y = A B

C or Y = A + B + C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff.

Key Features

  • 1.
  • 2 Available in the Texas Instruments NanoFree™ Package.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Provides Down Translation to VCC.
  • Max tpd of 3.8 ns at 3.3 V.
  • Low Power Consumption, 10-μA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Ioff Supports Live Insertion, Partial-Power- Down Mode, and Back Drive Protection.
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II.
  • ESD Protection Exce.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74LVC1G10 www.ti.com SCES486E – SEPTEMBER 2003 – REVISED DECEMBER 2013 Single 3-Input Positive-NAND Gate Check for Samples: SN74LVC1G10 FEATURES 1 •2 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Insertion, Partial-Power- Down Mode, and Back Drive Protection • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged Device Model (C101) DESCRIPTION The SN74LVC1G10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.