SN75LVDS82 Overview
Key Specifications
Package: TSSOP
Pins: 56
Operating Voltage: 3.3 V
Max Voltage (typical range): 3.6 V
Description
The SN75LVDS82 FlatLink™ receiver contains four serial-in, 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS83B, over five balanced-pair conductors, and expansion to 28 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate.
Key Features
- 1 4:28 Data Channel Expansion at up to 1904 Mbps Throughput
- Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
- Four Data Channels and Clock Low-Voltage Differential Channels In and 28 Data and Clock Low-Voltage TTL Channels Out
- Operates From a Single 3.3-V Supply With 250 mW (Typical)
- 5-V Tolerant SHTDN Input
