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SN75LVDS82 - Receiver

Description

The SN75LVDS82 FlatLink™ receiver contains four serial-in, 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

Features

  • 1 4:28 Data Channel Expansion at up to 1904 Mbps Throughput.
  • Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI.
  • Four Data Channels and Clock Low-Voltage Differential Channels In and 28 Data and Clock Low-Voltage TTL Channels Out.
  • Operates From a Single 3.3-V Supply With 250 mW (Typical).
  • 5-V Tolerant SHTDN Input.
  • Falling Clock-Edge-Triggered Outputs.
  • Packaged in Thin Shrink Small-Out.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN75LVDS82 SLLS259J – NOVEMBER 1996 – REVISED OCTOBER 2016 SN75LVDS82 FlatLink™ Receiver 1 Features •1 4:28 Data Channel Expansion at up to 1904 Mbps Throughput • Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI • Four Data Channels and Clock Low-Voltage Differential Channels In and 28 Data and Clock Low-Voltage TTL Channels Out • Operates From a Single 3.
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