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SN75LVDS86 Datasheet Receiver

Manufacturer: Texas Instruments

Overview: SN75LVDS86 FlatLink RECEIVER SLLS268D − MARCH 1997 − REVISED JULY 2006 D 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput D Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI D Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out D Operates From a Single 3.

General Description

NC − Not Connected The SN75LVDS86 FlatLink receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

These functions allow receipt of synchronous data from a patible transmitter, such as the SN75LVDS81, ’83, ’84, or ’85, over four balanced-pair conductors, and expansion to 21 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate.

When receiving, the high-speed LVDS data is received and loaded into registers at seven times (7×) the LVDS input clock (CLKIN) rate.

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