TPIC6B273 Datasheet | Texas Instruments

description The TPIC6B273 is a monolithic, high-voltage, medium-current, power logic octal D-type latch with DMOS-transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. The TPIC6B273 contains eight positive-edgetriggered D-type flip-flops with a direct clear input. Each flip-flop features an open-drain power DMOS-transistor output. When clear (CLR) is high, information at the D inputs meeting the setup time requirements is transferred to the DRAIN outputs on the positivegoing edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input (CLK) is at either the high or low level, the D input signal has no effect at the output. An asynchronous CLR is provided to turn all eight DMOS-transistor outputs off. When data is low for a given output, the DMOS-transistor output is off. When data is high, the DMOS-transistor output has sink-current capability. Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-m A continuous sink-current capability. Each output provides a 500-m A typical current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection. DW OR N PACKAGE (TOP VIEW) CLR 1 D1 2 D2 3 DRAIN1 4 DRAIN2 5 DRAIN3 6 DRAIN4 7 D3 8 D4 9 GND 10 20 VCC 19 D8 18 D7 17 DRAIN8 16 DRAIN7 15 DRAIN6 14 DRAIN5 13 D6 12 D5 11 CLK logic symbol† 1 CLR 11 CLK 2 D1 3 D2 8 D3 9 D4 12 D5 13 D6 18 D7 19 D8 R C1 1D 4 DRAIN1 5 DRAIN2 6 DRAIN3 7 DRAIN4 14 DRAIN5 15 DRAIN6 16 DRAIN7 17 DRAIN8 † This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12. FUNCTION TABLE (each channel) INPUTS OUTPUT...