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74HC164D - shift register

Download the 74HC164D datasheet PDF. This datasheet also covers the 74HC164 variant, as both devices belong to the same shift register family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register.

Key Features

  • Wide supply voltage range from 2.0 to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Input levels:.
  • For 74HC164: CMOS level.
  • For 74HCT164: TTL level.
  • Gated serial data inputs.
  • Asynchronous master reset.
  • Complies with JEDEC standards.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • ESD protection:.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC164-nexperia.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HC164D 8-Bit Shift Register Toshiba
74HC164D14 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS Diodes
74HC164 8-Bit Parallel-Out Serial Shift Registers Texas Instruments
74HC164 8-Bit Serial-Input/Parallel-Output Shift Register Motorola
74HC164 8-Bit Serial-in/Parallel-out Shift Register Fairchild

Other Datasheets by Nexperia

Part Number Description
74HC164 shift register
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 10 — 1 September 2021 Product data sheet 1. General description The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2.