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74HC4051D - 8-channel analog multiplexer/demultiplexer

Download the 74HC4051D datasheet PDF. This datasheet also covers the 74HC4051 variant, as both devices belong to the same 8-channel analog multiplexer/demultiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC4051; 74HCT4051 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications.

Key Features

  • Wide analog input voltage range from -5 V to +5 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Complies with JEDEC standards.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Low ON resistance:.
  • 80 Ω (typical) at VCC - VEE = 4.5 V.
  • 70 Ω (typical) at VCC - VEE = 6.0 V.
  • 60 Ω (typical) at VCC - VEE = 9.0 V.
  • Logic level t.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC4051-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 74HC4051D
Manufacturer Nexperia
File Size 394.83 KB
Description 8-channel analog multiplexer/demultiplexer
Datasheet download datasheet 74HC4051D Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC4051; 74HCT4051 8-channel analog multiplexer/demultiplexer Rev. 11 — 5 December 2022 Product data sheet 1. General description The 74HC4051; 74HCT4051 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0, S1 and S2), eight independent inputs/outputs (Yn), a common input/output (Z) and a digital enable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide analog input voltage range from -5 V to +5 V • CMOS low power dissipation • High noise immunity • Complies with JEDEC standards • JESD8C (2.