74HCT393PW Datasheet | Nexperia

description The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (n CP), an overriding asynchronous master reset input (n MR) and 4 buffered parallel outputs (n Q0 to n Q3). The counter advances on the HIGH-to-LOW transition of n CP. A HIGH on n MR clears the counter stages and forces the outputs LOW, independent of the state of n CP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits - Wide supply voltage range from 2.0 V to 6.0 V - CMOS low power dissipation - High noise immunity - Latch-up performance exceeds 100 m A per JESD 78 Class II Level B - plies with JEDEC standards: - JESD8C (2.7 V to 3.6 V) - JESD7A (2.0 V to 6.0 V) - Input levels: - For 74HC393: CMOS level - For 74HCT393: TTL level - ESD protection: - HBM JESD22-A114F exceeds 2000 V - MM JESD22-A115-A exceeds 200 V. - Two 4-bit binary counters with individual clocks - Divide by any binary module up to 28 in one package - Two master resets to clear each 4-bit counter individually 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74HC393D 74HCT393D -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm 74HC393PW 74HCT393PW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74HC393BQ 74HCT393BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line patible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Version SOT108-1 SOT402-1 SOT762-1 Nexperia 4. Functional diagram 1Q0 3 1 1CP 1Q1 4 1 1Q2 5 2 1MR 1Q3...