Datasheet4U Logo Datasheet4U.com

74VHCT125 - Quad buffer/line driver

This page provides the datasheet information for the 74VHCT125, a member of the 74VHC125 Quad buffer/line driver family.

Datasheet Summary

Description

The 74VHC125; 74VHCT125 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard JESD7-A.

The 74VHC125; 74VHCT125 provides four non-inverting buffer/line drivers with 3-state outputs.

Features

  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accepts voltages higher than VCC.
  • Input levels:.
  • The 74VHC125 operates with CMOS logic levels.
  • The 74VHCT125 operates with TTL logic levels.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C.

📥 Download Datasheet

Datasheet preview – 74VHCT125

Datasheet Details

Part number 74VHCT125
Manufacturer nexperia
File Size 238.22 KB
Description Quad buffer/line driver
Datasheet download datasheet 74VHCT125 Datasheet
Additional preview pages of the 74VHCT125 datasheet.

📁 Similar Datasheet

  • 74VHCT125 - Quad buffer/line driver (NXP)
  • 74VHCT125A - QUAD BUS BUFFERS (STMicroelectronics)
  • 74VHCT126 - Quad buffer/line driver (NXP)
  • 74VHCT126A - QUAD BUS BUFFERS (STMicroelectronics)
  • 74VHCT132A - QUAD 2-INPUT SCHMITT NAND GATE (STMicroelectronics)
  • 74VHCT138A - 3 TO 8 LINE DECODER INVERTING (STMicroelectronics)
  • 74VHCT138A - 3-to-8 Decoder/Demultiplexer (Fairchild Semiconductor)
  • 74VHCT139A - DUAL 2 TO 4 DECODER/DEMULTIPLEXER (STMicroelectronics)
  • 74VHCT14A - HEX SCHMITT INVERTER (STMicroelectronics)
  • 74VHCT14A - Hex Schmitt Inverter (Fairchild Semiconductor)
Other Datasheets by nexperia

Full PDF Text Transcription

Click to expand full text
74VHC125; 74VHCT125 Quad buffer/line driver; 3-state Rev. 3 — 8 April 2020 Product data sheet 1. General description The 74VHC125; 74VHCT125 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74VHC125; 74VHCT125 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. The 74VHC125; 74VHCT125 are identical to the 74VHC126; 74VHCT126 but have active LOW enable inputs. 2.
Published: |