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74VHCT125 Datasheet Quad Buffer/line Driver

Manufacturer: Nexperia

Overview: 74VHC125; 74VHCT125 Quad buffer/line driver; 3-state Rev. 3 — 8 April 2020 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74VHC125;

74VHCT125 are high-speed Si-gate CMOS devices and are pin patible with Low-power Schottky TTL (LSTTL).

They are specified in pliance with JEDEC standard JESD7-A.

Key Features

  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accepts voltages higher than VCC.
  • Input levels:.
  • The 74VHC125 operates with CMOS logic levels.
  • The 74VHCT125 operates with TTL logic levels.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C.

Similar Datasheet

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NXP Logo 74VHCT125 Quad buffer/line driver NXP
STMicroelectronics Logo 74VHCT125A QUAD BUS BUFFERS STMicroelectronics

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74VHCT125 Distributor