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74VHCT14 - Hex inverting Schmitt trigger

This page provides the datasheet information for the 74VHCT14, a member of the 74VHC14 Hex inverting Schmitt trigger family.

Datasheet Summary

Description

The 74VHC14; 74VHCT14 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7A.

Features

  • Balanced propagation delays.
  • All inputs have Schmitt-trigger action.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • The 74VHC14 operates with CMOS input level.
  • The 74VHCT14 operates with TTL input level.
  • ESD protection:.
  • HBM EIA/JESD22-A114E exceeds 2000 V.
  • MM EIA/JESD22-A115-A exceeds 200 V.
  • CDM EIA/JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +.

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Datasheet preview – 74VHCT14

Datasheet Details

Part number 74VHCT14
Manufacturer nexperia
File Size 278.30 KB
Description Hex inverting Schmitt trigger
Datasheet download datasheet 74VHCT14 Datasheet
Additional preview pages of the 74VHCT14 datasheet.

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Full PDF Text Transcription

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74VHC14; 74VHCT14 Hex inverting Schmitt trigger Rev. 2 — 1 November 2022 Product data sheet 1. General description The 74VHC14; 74VHCT14 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74VHC14; 74VHCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. 2.
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