74VHCT14 Description
74VHCT14 are high-speed Si-gate CMOS devices and are pin patible with Low-power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard No. 74VHCT14 provide six inverting buffers with Schmitt-trigger action.
74VHCT14 Key Features
- Balanced propagation delays
- All inputs have Schmitt-trigger action
- Inputs accept voltages higher than VCC
- Input levels
- The 74VHC14 operates with CMOS input level
- The 74VHCT14 operates with TTL input level
- ESD protection
- HBM EIA/JESD22-A114E exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- CDM EIA/JESD22-C101C exceeds 1000 V