CD4015BM Datasheet
CD4015BM Datasheet (National Semiconductor)
National Semiconductor
The CD4015BM CD4015BC contains two identical 4-stage serial-input parallel-output registers with independent ‘‘Data’’ ‘‘Clock ’’ and ‘‘Reset’’ inputs The logic level present at the input of each stage.
Y Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Medium speed operation Fully static design 3 0V to 18V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS 8 MHz (typ ) clock rate VDD b VSS e 10V Applications Y Y Y Serial-input parallel-output data queu.
CD4015BM Datasheet (Texas Instruments)
Texas Instruments
Data sheet acquired from Harris Semiconductor SCHS025D − Revised October 2003 The CD4015B-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line.
& Green Lead finish/ Ball material (6) NIPDAU NIPDAU SNPB SNPB NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU MSL Peak Temp Op Temp (°C) (3) N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type -55 to 125 -55 to 125 -55 to 125 N / A for Pkg Type -55 to 125 Level-1-260C-UNLIM Level-1-260C-UNLIM Level-.