| Part Number | HEF4027B Datasheet |
|---|---|
| Manufacturer | NXP Semiconductors |
| Overview | The HEF4027B is a edge-triggered dual JK flip-flop which features independent set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP is LOW, and transferre. independent set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct (CD) and set-direct (SD) inputs are independent and override the J, . |
HEF4027B Datasheet and Specifications PDF
The HEF4027B is a Dual JK flip-flop.
Key Specifications
| Package | SOP |
|---|---|
| Mount Type | Surface Mount |
| Pins | 16 |
| Operating Voltage | 5 V |
| Max Voltage (typical range) | 15 V |
| Min Voltage (typical range) | 3 V |
| Logic Function | AND, Flip-Flop |
| Clock Edge Trigger | Positive Edge |
| Part Number | HEF4027B Datasheet |
|---|---|
| Description | Dual JK flip-flop |
| Manufacturer | Nexperia |
| Overview |
The HEF4027B is a dual positive-edge triggered JK flip-flop featuring independent set direct (nSD), clear direct (nCD), clock inputs (nCP) and complementary outputs (nQ and nQ). Data is accepted when .
and benefits
* Wide supply voltage range from 3.0 V to 15.0 V * CMOS low power dissipation * High noise immunity * Fully static operation * 5 V, 10 V, and 15 V parametric ratings * Standardized symmetrical output characteristics * Complies with JEDEC standard JESD 13-B * ESD protection: * HBM: ANSI/. |