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HEF4027B Datasheet Dual Jk Flip-flop

Manufacturer: Nexperia

Overview: HEF4027B Dual JK flip-flop Rev. 12 — 8 August 2024 Product data sheet 1.

General Description

The HEF4027B is a dual positive-edge triggered JK flip-flop featuring independent set direct (nSD), clear direct (nCD), clock inputs (nCP) and plementary outputs (nQ and nQ).

Data is accepted when nCP is LOW, and transferred to the output on the positive-going edge of the clock.

The asynchronous clear-direct (nCD) and set-direct (nSD) are independent and override the nJ, nK, and nCP inputs.

Key Features

  • Wide supply voltage range from 3.0 V to 15.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Fully static operation.
  • 5 V, 10 V, and 15 V parametric ratings.
  • Standardized symmetrical output characteristics.
  • Complies with JEDEC standard JESD 13-B.
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V.
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V.
  • Specified from -40 °C to +85.

Similar Datasheet

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HEF4027B Distributor