The SY89874U is a Programmable Clock Divider/Fanout Buffer.
| Package | VQFN |
|---|---|
| Mount Type | Surface Mount |
| Pins | 16 |
| Max Voltage (typical range) | 3.63 V |
| Min Voltage (typical range) | 2.375 V |
| Logic Function | Clock |
| Max Frequency | 2.5 GHz |
| Height | 900 µm |
| Part Number | SY89874U Datasheet |
|---|---|
| Manufacturer | Microchip Technology |
| Overview |
This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622 MHz or higher) CML, LVPECL, LVDS, or HSTL clock input signal and dividing down the frequency using a programmable divid.
* Integrated Programmable Clock Divider and 1:2 Fanout Buffer * Guaranteed AC Performance over Temperature and Voltage: - >2.5 GHz fMAX - <250 ps tr/tf - <15 ps Within-Device Skew * Low Jitter Design: - <10 psPP Total Jitter - <1 psRMS Cycle-to-Cycle Jitter * Unique Input Termination and VT Pin for . |
| Part Number | SY89874U Datasheet |
|---|---|
| Description | Programmable Clock Divider/Fanout Buffer |
| Manufacturer | Micrel Semiconductor |
| Overview |
This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or HSTL clock input signal and dividing down the frequency using a programmable divider.
* Integrated programmable clock divider and 1:2 fanout buffer * Guaranteed AC performance over temperature and voltage: * >2.5GHz fMAX * <250ps tr/tf * <15ps within-device skew * Low-jitter design: * <10psPP total jitter * <1psRMS cycle-to-cycle jitter * Unique input termination and VT pin for DC-co. |
| Seller | Inventory | Price Breaks | Buy |
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| Onlinecomponents.com | 51 | 5+ : 10.37 USD 25+ : 8.63 USD 100+ : 7.7 USD 300+ : 7.66 USD |
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| Master Electronics | 51 | 5+ : 10.37 USD 25+ : 8.63 USD 100+ : 7.7 USD 300+ : 7.66 USD |
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| DigiKey | 3395 | 1+ : 10.4 USD 25+ : 8.67 USD 100+ : 7.89 USD |
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| Part Number | Manufacturer | Description |
|---|---|---|
| SY89874AU | Micrel Semiconductor | 2.5GHz Any-In to LVPECL Programmable Clock Divider/Fanout Buffer |