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CY7C1526KV18 CY7C1513KV18 CY7C1515KV18 72-Mbit QDR® II SRAM Four-Word Burst Architecture 72-Mbit QDR® II SRAM Four-Word Burst Architecture Features ■

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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1M x 16-Bit Dynamic RAM (1k & 4k -Refresh) HYB3116160BSJ/BST(L)-50/-60/-70 HYB3118160BSJ/BST(L)-50/-60/-70 Advanced Information • • • 1 048 576 wor

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1M x 16-Bit Dynamic RAM (1k & 4k -Refresh) HYB3116160BSJ/BST(L)-50/-60/-70 HYB3118160BSJ/BST(L)-50/-60/-70 Advanced Information • • • 1 048 576 wor

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 CY7C1311KV18/CY7C1911KV18 CY7C1313KV18/CY7C1315KV18 18-Mbit QDR® II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architec

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CY7C1521KV18 72-Mbit DDR II SRAM Four-Word Burst Architecture 72-Mbit DDR II SRAM Four-Word Burst Architecture Features ■ 72-Mbit Density (2M × 36) ■

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1M x 16-Bit Dynamic RAM (1k & 4k -Refresh) HYB3116160BSJ/BST(L)-50/-60/-70 HYB3118160BSJ/BST(L)-50/-60/-70 Advanced Information • • • 1 048 576 wor

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Da ta S h e e t , V 2 .0 , J a n . 2 0 0 1 C161K C161O 16-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . E

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w w w .d e e h s a t a . u t4 m o c www.DataSheet4U.com

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GT93C46 Advanced GT93C46 1K-bit Microwire Serial EEPROM www.giantec-semi.com a0 1/18 GT93C46 Table of Content 1 FEATURES

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CY7C4121KV13/CY7C4141KV13 144-Mbit QDR™-IV HP SRAM 144-Mbit QDR™-IV HP SRAM Features ■ 144-Mbit density (8M ×18, 4M ×36) ■ Total Random Transaction R

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Da ta S h e e t , V 2 .0 , J a n . 2 0 0 1 C161K C161O 16-Bit Single-Chip Microcontroller Microcontrollers N e v e r s t o p t h i n k i n g . E

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18-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C

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SH67P847 OTP 1K 4-bit micro-controller with 10-bit SAR ADC Features „ SH6610C-Based Single-Chip 4-bit Micro-Controller With 10-bit SAR ADC „ OTP RO

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M93C86, M93C76, M93C66 M93C56, M93C46, M93C06 16Kbit, 8Kbit, 4Kbit, 2Kbit, 1Kbit and 256bit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM FEAT

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CY7C1319KV18/CY7C1321KV18 18-Mbit DDR II SRAM Four-Word Burst Architecture 18-Mbit DDR II SRAM Four-Word Burst Architecture Features ■ 18-Mbit densit

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INTEGRATED CIRCUITS XA-S3 XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V), I2C, 2 UARTs, 16 MB add

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INTEGRATED CIRCUITS XA-S3 XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V), I2C, 2 UARTs, 16 MB add

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