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No	Part Number	Description	Manufacture	PDF
116	74F10	54F10 Triple 3-Input NAND Gate (Rev. A)	Texas Instruments
115	74F10	Triple 3-input NAND gate INTEGRATED CIRCUITS 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate Product specification IC15 Data Handbook 1989 Sep 20 Philips Semiconductors Philips Semiconductors Product specific	NXP
114	74F10	Triple 3-Input NAND Gate 74F10 Triple 3-Input NAND Gate April 1988 Revised July 1999 74F10 Triple 3-Input NAND Gate General Description This device contains three independent gates, each of which performs the logic NAND fun	Fairchild Semiconductor
113	74F10	Triple 3-Input NAND Gate 54F 74F10 Triple 3-Input NAND Gate December 1994 54F 74F10 Triple 3-Input NAND Gate General Description This device contains three independent gates each of which performs the logic NAND function C	National Semiconductor
112	74F1056	8-Bit Schottky Barrier Diode Array 74F1056 8-Bit Schottky Barrier Diode Array December 1993 Revised August 1999 74F1056 8-Bit Schottky Barrier Diode Array General Description The 74F1056 is an 8-bit Schottky barrier diode array desig	Fairchild Semiconductor
111	74F1071	18-Bit Undershoot/Overshoot Clamp 74F1071 18-Bit Undershoot/Overshoot Clamp October 1994 Revised August 1999 74F1071 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device General Description The 74F1071 is an 18-bit undershoot	Fairchild Semiconductor
110	74F109	Dual JK (Note: Overbar Over the K) Positive Edge-Triggered Flip-Flop (Rev. A)	Texas Instruments
109	74F109	Dual JK Positive Edge-Triggered Flip-Flop 54F/74F109 54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop November 1994 54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’F109 consists of two high-speed, comple	National Semiconductor
108	74F109	Positive J-K positive edge-triggered flip-flops INTEGRATED CIRCUITS 74F109 Positive J-K positive edge-triggered flip-flops Product specification IC15 Data Handbook 1990 Oct 23 Philips Semiconductors Philips Semiconductors Product specification	NXP
107	74F109	Dual JK Positive Edge-Triggered Flip-Flop 74F109 Dual JK Positive Edge-Triggered Flip-Flop April 1988 Revised November 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The F109 consists of two high-speed, completely	Fairchild Semiconductor
106	74F11	Triple 3-Input AND Gate (Rev. A)	Texas Instruments
105	74F11	Triple 3-Input AND Gate 54F/74F11 54F/74F11 Triple 3-Input AND Gate December 1994 54F/74F11 Triple 3-Input AND Gate General Description This device contains three independent gates, each of which performs the logic AND fun	National Semiconductor

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