RST Datasheet | Specifications & PDF Download

GN25L95 2.5 Gbps CMOS Burst Mode Laser Driver & Limiting Post Amplifier with On-Chip Digital Diagnostic Monitoring Main Features • 100 mA bias curre

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() CRST025N08N,CRSS023N08N SkyMOS1 N-MOSFET 85V, 2mΩ, 180A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS(on)

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() CRST073N15N, CRSS070N15N SkyMOS1 N-MOSFET 150V, 6.2mΩ, 135A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS

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Shenzhen First-Rank Technology Co., Ltd SPECIFICATION T24C02A/T24C04A/T24C08A/T24C16A Version 2.0 reserves the right to change this documentation wit

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() CRST055N07N,CRSS053N07N SkyMOS1 N-MOSFET 70V, 4.6mΩ, 120A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS(o

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CREAT BY ART MBR3040CTG THRU MBR30200CTG 30.0 AMPS. Schottky Barrier Rectifiers - - 12 3 1 2 3 Marking Diagram YAWW MBR30XX Y = Year A = Assembly

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SF1565 Highly Integrated Current Mode PWM Controller FEATURES ◆ Built-in Soft Start Function ◆ Very Low Startup Current ◆ Frequency Reduction and Burs

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Shenzhen First-Rank Technology Co., Ltd SPECIFICATION T25S32 Version 2.0 reserves the right to change this documentation without prior notice. Shenz

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() CRST049N08N, CRSS046N08N SkyMOS1 N-MOSFET 85V, 4.1mΩ, 120A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS(

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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() CRST041N08N, CRSS038N08N SkyMOS1 N-MOSFET 85V, 3.4mΩ, 120A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS(

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() CRST052N15N3Z, CRSS049N15N3Z SkyMOS3 N-MOSFET 150V, 4mΩ, 160A Features • Uses CRM(CQ) advanced SkyMOS3 technology • Extremely low on-resistance R

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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CY7C1241V18 CY7C1256V18 CY7C1243V18 CY7C1245V18 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) Features • Separate independ

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CREAT BY ART MBR2040CTG THRU MBR20200CTG 20.0 AMPS. Schottky Barrier Rectifiers - -         12 3  1 2 3      1.71  Marking Diagr

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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MCR106-6G,MCR106-8G SCRs Description Glass passivated, sensitive gate thyristors in a plastic envelope, intended for use in general purpose switching

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() CRST030N10N,CRSS028N10N SkyMOS1 N-MOSFET 100V, 2.5mΩ, 180A Features • Uses CRM(CQ) advanced SkyMOS1 technology • Extremely low on-resistance RDS(

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