AS4C512M8D3L Datasheet | Alliance Semiconductor

4Gb DDR3L - AS4C512M8D3L Revision History AS4C512M8D3L - 78-ball FBGA PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Added "Backward patible to VDD & VDDQ = 1.5V +/0.075V" - page 2 Updated Table 12. Remended DC Operating Conditions - page 21 Added CL=5 & CL=6 to Table 18 - page 26 Date April 2014 August 2014 Confidential Rev. 2.0 Aug. /2014 4Gb DDR3L - AS4C512M8D3L 512M x 8 bit DDR3L Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 2.0, Aug. /2014) Features - JEDEC Standard pliant - Power supplies: VDD & VDDQ = +1.35V - Backward patible to VDD & VDDQ = 1.5V ±0.075V - Operating temperature: - mercial (Extended) (0 ~ 95°C) - Industrial (-40 ~...