AS4C512M8D4A Description
AS4C512M8D4A Revision History 4Gb DDR4 AS4C512M8D4A - 78 ball FBGA PACKAGE Revision Rev 1.0 Details Initial Release Date Aug 2022 Confidential -1213- Rev.1.0 Aug 2022 AS4C512M8D4A Confidential 512M x 8 bit DDR4 Synchronous DRAM (SDRAM) Rev. 1.0, Aug.
AS4C512M8D4A Key Features
- JEDEC Standard pliant
- Fast clock rate: 1333MHz
- Power supplies
- VDD & VDDQ = +1.2V ± 0.06V
- VPP = +2.5V -0.125V / +0.25V
- Operating temperature: -Industrial : TC = -40~95°C -mercial : TC = 0~95°C
- Supports JEDEC clock jitter specification
- Bidirectional differential data strobe, DQS &DQS#
- Differential Clock, CK & CK#
- 16 internal banks: 4 groups of 4 banks each