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ASM5I9773A - 12-Output Zero Delay Buffer

Description

The ASM5I9773A is a low-voltage high-performance 200-MHz PLL-based zero delay buffer designed for high speed clock distribution applications.

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Features

  • Output frequency range: 8.33MHz to 200MHz Input frequency range: 6.25MHz to 125MHz 2.5V or 3.3V operation ASM5I9773A The ASM5I9773A features one LVPECL and two LVCMOS reference clock inputs and provides 12 outputs partitioned in three banks of four outputs each. Each bank divides the VCO output per SEL(A:C) settings (see Table 2. Function Table (Configuration Controls)). These dividers allow output-to-input ratios of 8:1, 6:1, 5:1, 4:1, 3:1, 8:3, 5:2, 2:1, 5:3, 3:2, 4:3, 5:4,.

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Datasheet Details

Part number ASM5I9773A
Manufacturer Alliance Semiconductor
File Size 663.52 KB
Description 12-Output Zero Delay Buffer
Datasheet download datasheet ASM5I9773A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer Features ƒ ƒ ƒ Output frequency range: 8.33MHz to 200MHz Input frequency range: 6.25MHz to 125MHz 2.5V or 3.3V operation ASM5I9773A The ASM5I9773A features one LVPECL and two LVCMOS reference clock inputs and provides 12 outputs partitioned in three banks of four outputs each. Each bank divides the VCO output per SEL(A:C) settings (see Table 2. Function Table (Configuration Controls)). These dividers allow output-to-input ratios of 8:1, 6:1, 5:1, 4:1, 3:1, 8:3, 5:2, 2:1, 5:3, 3:2, 4:3, 5:4, 1:1, and 5:6. Each LVCMOS-compatible output can drive 50Ω series- or parallel-terminated transmission lines.
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