Datasheet Specifications
- Part number
- ASM5I9774A
- Manufacturer
- Alliance Semiconductor
- File Size
- 513.59 KB
- Datasheet
- ASM5I9774A_AllianceSemiconductor.pdf
- Description
- 12-Output Zero Delay Buffer
Description
June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer .
Features
* Output frequency range: 8.3MHz to 125MHz Input frequency range: 4.2MHz to 62.5MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs 14 Clock outputs: Drive up to 28 clock lines 2 LVCMOS reference clock inputs 150 pS max output-outpApplications
* When PLL_EN is LOW, PLL is bypassed and the reference clock directly feeds the output dividers. This mode is fully static and the minimum input clock frequency specification does not apply. Block Diagram VCO_SEL PLL_EN TCLK_SEL TCLK0 TCLK1 FB_IN SELA +2/+4 CLK STOP +2 PLL 200500MHZ +2/+4 +4 CASM5I9774A Distributors
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