Datasheet Specifications
- Part number
- ASM5I9352
- Manufacturer
- Alliance Semiconductor
- File Size
- 513.00 KB
- Datasheet
- ASM5I9352_AllianceSemiconductor.pdf
- Description
- 11-Output Zero Delay Buffer
Description
July 2005 rev 0.2 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer .
Features
* Output frequency range: 25MHz to 200MHz Output frequency range: 16.67MHz to 200MHz Input frequency range: 16.67MHz to 200MHz ASM5I9352 The ASM5I9352 features an LVCMOS reference clock input and provides 11 outputs partitioned in 3 banks of 5, 4, and 2 outputs. Bank A divides theApplications
* When PLL_EN# is HIGH, PLL is bypassed and the reference clock directly feeds the output dividers. This mode is fully static and the minimum input clock frequency specification does not apply. Alliance Semiconductor 2575, Augustine DriveASM5I9352 Distributors
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