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ASM5I9352 Datasheet - Alliance Semiconductor

ASM5I9352 11-Output Zero Delay Buffer

The ASM5I9352 is a low voltage high performance 200MHz PLL-based zero delay buffer designed for high speed clock distribution applications. When PLL_EN# is HIGH, PLL is bypassed and the reference clock directly feeds the output dividers. This mode is fully static and the minimum input clock frequenc.

ASM5I9352 Features

* Output frequency range: 25MHz to 200MHz Output frequency range: 16.67MHz to 200MHz Input frequency range: 16.67MHz to 200MHz ASM5I9352 The ASM5I9352 features an LVCMOS reference clock input and provides 11 outputs partitioned in 3 banks of 5, 4, and 2 outputs. Bank A divides the

ASM5I9352_AllianceSemiconductor.pdf

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Datasheet Details

Part number:

ASM5I9352

Manufacturer:

Alliance Semiconductor

File Size:

513.00 KB

Description:

11-output zero delay buffer.

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ASM5I9352 ASM5I9352 11-Output Zero Delay Buffer Alliance Semiconductor

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