ASM5I9653A - 3.3V 1:8 LVCMOS PLL Clock Generator
The ASM5I9653A utilizes PLL technology to frequency lock its outputs onto an input reference clock.
Normal operation of the ASM5I9653A requires the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback).
With the PLL locked, the output frequency is equa
ASM5I9653A Features
* 1:8 PLL based low-voltage clock generator Supports zero-delay operation 3.3V power supply ASM5I9653A running at either 4x or 8x of the reference clock frequency. The ASM5I9653A is guaranteed to lock in a low power PLL mode in the high frequency range (VCO_SEL = 0) down to PLL = 1