Datasheet Specifications
- Part number
- ASM5I961P
- Manufacturer
- Alliance Semiconductor
- File Size
- 662.43 KB
- Datasheet
- ASM5I961P_AllianceSemiconductor.pdf
- Description
- Low Voltage Zero Delay Buffer
Description
July 2005 rev 0.2 Low Voltage Zero Delay Buffer .
Features
* Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance ASM5I961P reference clock while the ASM5I961P offers an LVPECL reference clock. When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance statApplications
* The ASM5I961P is offered with two different input configurations. The ASM5I961P offers an LVCMOS Block Diagram VCC PCLK PCLK 50K Ref PLL 0 1 Q0 Q1 Q2 Q3 50K 50K FB 50K 100-200 MHz 50-100 MHz FB_IN F_RANGE 50K Q14 Q15 Q16 OE 50K QFB Figure 1. ASM5I961P Logic Diagram Alliance SemiconductorASM5I961P Distributors
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