ASM5I961C - Low Voltage Zero Delay Buffer

Product Overview

Alliance Semiconductor

Part number	ASM5I961C
Manufacturer	Alliance Semiconductor
File Size	723.26 KB
Description	Low Voltage Zero Delay Buffer
Datasheet	ASM5I961C Datasheet
Additional preview pages of the ASM5I961C datasheet.

The ASM5I961C is a 2.5V or 3.3V compatible, 1:18 PLL based zero delay buffer.

Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance ASM5I961C reference clock while the ASM5I961P offers an LVPECL reference clock. When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance state. Because the OE pin does not affect the QFB output, down stream clocks can be disabled without the internal PLL losing lock. The ASM5I961C is fully 2.5V or 3.3V compatible and requires no external l.

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Published: May 9, 2008 |