Description
The AS7C33128PFD18B is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 18 bits and incorporate a pipeline for highest frequency on any given technology.
Features
- Organization: 131,072 words × 18 bits.
- Fast clock speeds to 200 MHz.
- Fast clock to data access: 3.0/3.5/4.0 ns.
- Fast OE access time: 3.0/3.5/4.0 ns.
- Fully synchronous register-to-register operation.
- Double-cycle deselect.
- Asynchronous output enable control.
- Available in 100-pin TQFP package www. DataSheet4U. com.
- Individual byte write and global write.
- Multip.
AS7C33128PFD18B_AllianceSemiconductorCorporation.pdf