* Organization: 524,288 words × 32 or 36 bits Fast clock speeds to 166 MHz Fast clock to data access: 3.4/3.8 ns Fast OE access time: 3.4/3.8 ns Fully synchronous register-to-register operation Double-cycle deselect Asynch
AS7C33512PFD32A Datasheet (587.48 KB)
AS7C33512PFD32A
Alliance Semiconductor Corporation
587.48 KB
(as7c33512pfd32a / as7c33512pfd36a) 3.3v 512k x 32/36 pipelined burst synchronous sram.
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