Datasheet4U Logo Datasheet4U.com

CY7C09159AV - 3.3-V 8 K x 9 Synchronous Dual Port Static RAM

Features

  • True dual-ported memory cells which allow simultaneous access of the same memory location.
  • Flow-through/Pipelined device.
  • 8 K × 9 organization (CY7C09159AV).
  • Three Modes.
  • Flow-through.
  • Pipelined.
  • Burst.
  • Pipelined output mode on both ports allows fast 67-MHz operation.
  • 0.35-micron complementary metal oxide semiconductor (CMOS) for optimum speed/power.
  • High-speed clock to data access 9 ns (max. ) Logic Block Diagram.
  • 3.3 V Low operating power.

📥 Download Datasheet

📁 Similar Datasheet

  • CY7C09449PV-AC - 128 Kb Dual-Port SRAM (Cypress)
  • CY7C008 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C008V - 3.3V 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C009 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C009V - 128K x 8 Dual-Port Static RAM (Cypress)
  • CY7C018 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C018V - 3.3V 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C019 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C019V - 3.3V 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
  • CY7C0430BV - 10 Gb/s 3.3V QuadPort DSE (Cypress)
Other Datasheets by Cypress Semiconductor
  • CY7C09159 - 8K/16K x 9 Synchronous Dual-Port Static RAM
  • CY7C09169 - 8K/16K x 9 Synchronous Dual-Port Static RAM
  • CY7C09179V - (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
  • CY7C09189 - (CY7C09xx9) 64K/128K x 8/9 Synchronous Dual-Port Static RAM
  • CY7C09189V - (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
  • CY7C09199 - (CY7C09xx9) 64K/128K x 8/9 Synchronous Dual-Port Static RAM
  • CY7C09199V - (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM
  • CY7C09079V - (CY7C09xx9V) 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM

Full PDF Text Transcription

Click to expand full text
CY7C09169AVTITLE CY7C09159AV 3.3-V 8 K × 9 Synchronous Dual Port Static RAM Features ■ True dual-ported memory cells which allow simultaneous access of the same memory location ■ Flow-through/Pipelined device ❐ 8 K × 9 organization (CY7C09159AV) ■ Three Modes ❐ Flow-through ❐ Pipelined ❐ Burst ■ Pipelined output mode on both ports allows fast 67-MHz operation ■ 0.35-micron complementary metal oxide semiconductor (CMOS) for optimum speed/power ■ High-speed clock to data access 9 ns (max.) Logic Block Diagram ■ 3.
Published: |