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CY7C1298H Datasheet - Cypress Semiconductor

1-Mbit (64K x 18) Pipelined DCD Sync SRAM

CY7C1298H Features

* Registered inputs and outputs for pipelined operation

* Optimal for performance (Double-Cycle deselect)

* Depth expansion without wait state

* 64K × 18-bit common I/O architecture

* 3.3V core power supply (VDD)

* 2.5V/3.3V I/O power supply (VDDQ)

CY7C1298H General Description

1] The CY7C1298H SRAM integrates 64K x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addresse.

CY7C1298H Datasheet (407.12 KB)

Preview of CY7C1298H PDF

Datasheet Details

Part number:

CY7C1298H

Manufacturer:

Cypress Semiconductor

File Size:

407.12 KB

Description:

1-mbit (64k x 18) pipelined dcd sync sram.

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CY7C1298H 1-Mbit 64K Pipelined DCD Sync SRAM Cypress Semiconductor

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