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CY7C1339G - 4-Mbit Pipelined Sync SRAM

Description

The CY7C1339G SRAM integrates 128K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK).

Features

  • Registered inputs and outputs for pipelined operation.
  • 128K × 32 common I/O architecture.
  • 3.3 V core power supply (VDD).
  • 2.5 V/3.3 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 4.0 ns (for 133-MHz device).
  • Provide high-performance 3-1-1-1 access rate.
  • User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self-timed writes.
  • Asyn.

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Full PDF Text Transcription

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CY7C1339G 4-Mbit (128K × 32) Pipelined Sync SRAM 4-Mbit (128K × 32) Pipelined Sync SRAM Features ■ Registered inputs and outputs for pipelined operation ■ 128K × 32 common I/O architecture ■ 3.3 V core power supply (VDD) ■ 2.5 V/3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 4.
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