CY7C1347D sram equivalent, 128k x 36 synchronous-pipelined cache sram.
* Fast access times: 2.5 and 3.5 ns
* Fast clock speed: 250, 225, 200, and 166 MHz
* 1.5-ns set-up time and 0.5-ns hold time
* Fast OE access times: 2.5 n.
* JTAG boundary scan
* JEDEC standard pinout
* Low profile 119-lead, 14-mm x 22-mm BGA (Ball Grid Array) and.
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