CYRS1545AV18 Overview
The CYRS1543AV18 and CYRS1545AV18 are synchronous pipelined SRAMs, equipped with 1.8 V QDR II+ architecture with RadStop™ technology. Cypress’s state-of-the-art RadStop Technology is radiation hardened through proprietary design and process hardening techniques. The QDR II+ architecture consists of two separate ports:.
CYRS1545AV18 Key Features
- Separate independent read and write data ports
- Supports concurrent transactions
- 250 MHz clock for high bandwidth
- Four-word burst for reducing address bus frequency
- Double data rate (DDR) interfaces on both read and write ports
- Two input clocks (K and K) for precise DDR timing
- SRAM uses rising edges only
- Echo clocks (CQ and CQ) simplify data capture in high speed
- Single multiplexed address input bus latches address inputs
- Separate port selects for depth expansion