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CYRS1544AV18 Datasheet 72-mbit Qdr Ii+ Sram Two-word Burst Architecture

Manufacturer: Cypress (now Infineon)

Overview: CYRS1542AV18 CYRS1544AV18 72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology 72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology Radiation Performance Radiation Data ■ Total Dose =300 Krad ■ Soft error rate (both Heavy Ion and proton) Heavy ions  1 × 10-10 upsets/bit-day with single error correction - double error detection error detection and correction (SEC-DED EDAC) ■ Neutrons = 2.0 × 1014 N/cm2 ■ Dose rate = 2.0 × 109 rad(Si)/sec ■ Dose rate survivability (rad(Si)/sec) = 1.5 × 10^11 rad(Si)/sec ■ Latch up immunity = 120 MeV.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The CYRS1542AV18 and CYRS1544AV18 are synchronous pipelined SRAMs, equipped with 1.8-V QDR II+ architecture with RadStop™ tec

Key Features

  • Separate independent read and write data ports.
  • Supports concurrent transactions.
  • 250-MHz clock for high bandwidth.
  • 2-word burst on all accesses.
  • Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz).
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Echo clocks (CQ and CQ) simplify data capture in high speed systems.
  • Single multiplexed address input bus latches address i.

More Datasheets from Cypress (now Infineon)

Part Number Description
CYRS1542AV18 72-Mbit QDR II+ SRAM Two-Word Burst Architecture
CYRS1543AV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture
CYRS1545AV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture
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