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CYRS1545AV18 - 72-Mbit QDR II+ SRAM Four-Word Burst Architecture

This page provides the datasheet information for the CYRS1545AV18, a member of the CYRS1543AV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture family.

Datasheet Summary

Description

The CYRS1543AV18 and CYRS1545AV18 are synchronous pipelined SRAMs, equipped with 1.8 V QDR II+ architecture with RadStop™ technology.

Cypress’s state-of-the-art RadStop Technology is radiation hardened through proprietary design and process hardening techniques.

Features

  • Separate independent read and write data ports.
  • Supports concurrent transactions.
  • 250 MHz clock for high bandwidth.
  • Four-word burst for reducing address bus frequency.
  • Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz).
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Echo clocks (CQ and CQ) simplify data capture in high speed systems.
  • Single multiplexed address input.

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Datasheet preview – CYRS1545AV18

Datasheet Details

Part number CYRS1545AV18
Manufacturer Cypress Semiconductor
File Size 465.06 KB
Description 72-Mbit QDR II+ SRAM Four-Word Burst Architecture
Datasheet download datasheet CYRS1545AV18 Datasheet
Additional preview pages of the CYRS1545AV18 datasheet.

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Full PDF Text Transcription

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72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology Radiation Performance Radiation Data ■ Total Dose =300 Krad ■ Soft error rate (both Heavy Ion and proton) Heavy ions  1 × 10-10 upsets/bit-day with an external SECDED EDAC Controller ■ Neutrons = 2.0 × 1014 N/cm2 ■ Dose rate = 2.0 × 109 rad(Si)/sec ■ Dose rate survivability (rad(Si)/sec) = 1.5 × 10^11 (rad(Si)/sec ■ Latch up immunity = 120 MeV.cm2/mg (125 °C) Prototyping Options ■ Non-qualified CYPT1543AV18, and CYPT1545AV18 devices with same functional and timing characteristics in a 165-ball Ceramic Column Grid Array (CCGA) package and Land Grid Array (LGA) package without solder columns attached.
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