74AUP2G07 Datasheet DUAL BUFFERS

Manufacturer: Diodes Incorporated

Datasheet Details

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G07 is composed of two buffers with open drain outputs designed for operation over a power supply range of 0.8V to 3.6V.

The device is fully specified for partial power down applications using IOFF.

NEW PRODUCT 74AUP2G07 DUAL BUFFERS WITH OPEN DRAIN OUTPUTS.

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8V to 3.6V.
-4mA Output Drive at 3.0V.
Low Static Power Consumption.
ICC < 0.9µA.
Low Dynamic Power Consumption.
CPD = 1.2pF Typical at 3.6V.
Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. The Hysteresis is Typically 250mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.
ESD Protection per JESD 22.
Exceeds 200.

Brand Logo	Part Number	Description	Manufacturer
	74AUP2G07	Low-power dual buffer	NXP Semiconductors
	74AUP2G07	Low-power dual buffer	nexperia

Part Number	Description
74AUP2G00	DUAL NAND GATE
74AUP2G02	DUAL NOR GATE
74AUP2G04	DUAL INVERTERS
74AUP2G06	DUAL INVERTERS
74AUP2G08	DUAL AND GATE
74AUP2G125	DUAL 3-STATE BUFFER
74AUP2G126	DUAL 3-STATE BUFFER
74AUP2G14	DUAL SCHMITT TRIGGER INVERTERS
74AUP2G17	DUAL SCHMITT TRIGGER BUFFERS
74AUP2G32	DUAL OR GATE