74AUP2G00 Datasheet - Diodes

DUAL NAND GATE

74AUP2G00 Features

* Advanced Ultra Low Power (AUP) CMOS

* Supply Voltage Range from 0.8V to 3.6V

* ±4mA Output Drive at 3.0V

* Low Static Power Consumption ICC < 0.9µA

* Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V)

* Schmitt Trigger Action at all inputs ma

74AUP2G00 General Description

Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G00 is a dual two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The de.

74AUP2G00 Datasheet (243.78 KB)