74AUP2G00-Q100 Datasheet, Gate, nexperia

74AUP2G00-Q100 Features

  • Gate
  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range

PDF File Details

Part number:

74AUP2G00-Q100

Manufacturer:

nexperia ↗

File Size:

218.76kb

Download:

📄 Datasheet

Description:

Low-power dual 2-input nand gate. The 74AUP2G00-Q100 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower inp

Datasheet Preview: 74AUP2G00-Q100 📥 Download PDF (218.76kb)
Page 2 of 74AUP2G00-Q100 Page 3 of 74AUP2G00-Q100

74AUP2G00-Q100 Application

  • Applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

TAGS

74AUP2G00-Q100
Low-power
dual
2-input
NAND
gate
nexperia

📁 Related Datasheet

74AUP2G00 - Low-power dual 2-input NAND gate (NXP)
74AUP2G00 Low-power dual 2-input NAND gate Rev. 8 — 5 February 2013 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NA.

74AUP2G00 - DUAL NAND GATE (Diodes)
NEW PRODUCT 74AUP2G00 DUAL NAND GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power an.

74AUP2G00 - Low-power dual 2-input NAND gate (nexperia)
74AUP2G00 Low-power dual 2-input NAND gate Rev. 11 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND .

74AUP2G02 - DUAL NOR GATE (Diodes)
NEW PRODUCT 74AUP2G02 DUAL NOR GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and.

74AUP2G02 - Low-power Dual 2-input NOR Gate (NXP)
74AUP2G02 Low-power dual 2-input NOR gate Rev. 7 — 4 February 2013 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input N.

74AUP2G02 - Low-power dual 2-input NOR gate (nexperia)
74AUP2G02 Low-power dual 2-input NOR gate Rev. 9 — 27 July 2021 Product data sheet 1. General description The 74AUP2G02 is a dual 2-input NOR gate. .

74AUP2G04 - Low-power dual inverter (NXP)
74AUP2G04 Low-power dual inverter Rev. 6 — 17 September 2015 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers..

74AUP2G04 - DUAL INVERTERS (Diodes)
Preliminary Datasheet 74AUP2G04 DUAL INVERTERS Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extend.

74AUP2G04 - Low-power dual inverter (nexperia)
74AUP2G04 Low-power dual inverter Rev. 8 — 31 January 2022 Product data sheet 1. General description The 74AUP2G04 is a dual inverter. Schmitt-trigg.

74AUP2G04-Q100 - Low-power dual inverter (nexperia)
74AUP2G04-Q100 Low-power dual inverter Rev. 3 — 31 January 2022 Product data sheet 1. General description The 74AUP2G04-Q100 is a dual inverter. Sch.

Since 2006. D4U Semicon.   |   Datasheet4U.com   |   Contact Us   |   Privacy Policy   |   Purchase of parts