74AUP2G132 Datasheet (nexperia) - Low-power dual 2-input NAND Schmitt trigger

74AUP2G132, Low-power dual 2-input NAND Schmitt trigger

The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF.

The IOFF circuitry disables the ou

74AUP2G132 Features

* Wide supply voltage range from 0.8 V to 3.6 V

* CMOS low power dissipation

* High noise immunity

* Low static power consumption; ICC = 0.9 μA (maximum)

* Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

* Overvoltage tolerant inputs t