74AUP2G125 - DUAL 3-STATE BUFFER

Diodes

74AUP2G125 Datasheet Preview — Preview of 74AUP2G125 PDF

Datasheet Details

Part number	74AUP2G125
Manufacturer	DIODES ↗
File Size	414.13 KB
Description	DUAL 3-STATE BUFFER
Datasheet	74AUP2G125-Diodes.pdf

74AUP2G125 Product details

Description

Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.The 74AUP2G125 is a dual 3-State Buffer.Each buffer has an individual output enable pin while asserted HIGH will place the output in a high impedance state.The device is designed for operation over a power supply range of 0.8 V to 3.6 V.The device is fully specified for partial power down applications using IOFF.The IOFF circuitry disables the o

Features

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8 V to 3.6 V.
± 4 mA Output Drive at 3.0 V.
Low Static Power Consumption.
Icc < 0.9 uA.
Low Dynamic Power Consumption.
CPD = 6 pF Typical at 3.6 V.
Schmitt trigger action at all inputs make the circuit tolerant for slower input rise and fal.

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Published: Oct 26, 2016 |