74AUP2G17 Low-power dual Schmitt trigger

NXP Semiconductors

Description

www.DataSheet4U.com 74AUP2G17 Low-power dual Schmitt trigger Rev.02 * 10 January 2008 Product data sheet 1.General .
The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

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Datasheet Specifications

Part number: 74AUP2G17
Manufacturer: NXP ↗ Semiconductors
File Size: 137.94 KB
Datasheet: 74AUP2G17_NXPSemiconductors.pdf
Description: Low-power dual Schmitt trigger

Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E Class 3A exceeds 5000

Applications

* using IOFF. The IOFF circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74AUP2G17 provides two Schmitt trigger buffers. It is capable of transforming slowly changing input signals into sharply deﬁned, jitter-free output signals. The

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74AUP2G17 Low-power dual Schmitt trigger NXP Semiconductors

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