74AUP2G00 Datasheet - NXP

74AUP2G00 Low-power dual 2-input NAND gate

The 74AUP2G00 provides dual 2-input NAND function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from.

74AUP2G00 Features

* Wide supply voltage range from 0.8 V to 3.6 V

* High noise immunity

* Complies with JEDEC standards:

* JESD8-12 (0.8 V to 1.3 V)

* JESD8-11 (0.9 V to 1.65 V)

* JESD8-7 (1.2 V to 1.95 V)

* JESD8-5 (1.8 V to 2.7 V)

* JESD8-B (2.7 V to 3.6 V)

* ESD protection:

74AUP2G00_PhilipsSemiconductors.pdf