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74AUP2G38

Low Power Dual 2-Input NAND Gate

74AUP2G38 Features

* I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114-D Class 3A exceeds 500

74AUP2G38 General Description

The 74AUP2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device e.

74AUP2G38 Datasheet (128.95 KB)

Preview of 74AUP2G38 PDF

Datasheet Details

Part number:

74AUP2G38

Manufacturer:

NXP ↗

File Size:

128.95 KB

Description:

Low power dual 2-input nand gate.
www.DataSheet4U.com 74AUP2G38 Low-power dual 2-input NAND gate (open-drain) Rev. 01

* 16 October 2006 Product data sheet 1. General descript.

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74AUP2G38 Low Power Dual 2-Input NAND Gate NXP

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