74AUP2G3404 Datasheet - Diodes

BUFFER AND INVERTER

74AUP2G3404 Features

* Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption

* ICC < 0.9µA CPD = 6pF Typical at 3.6V Low Dynamic Power Consumption Schmitt Trigger Action at All

74AUP2G3404 General Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G3404 has one buffer and one inverter. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully .

74AUP2G3404 Datasheet (400.55 KB)