EM44CM1688LBA Key Features
- JEDEC Standard VDD/VDDQ=1.8V ± 0.1V
- All inputs and outputs are patible with SSTL_18 interface
- Fully differential clock inputs (CK,/CK) operation
- 8 Banks
- Posted CAS
- Burst Length: 4 and 8
- Programmable CAS Latency (CL): 3, 4 and 5
- Programmable Additive Latency (AL)
- Write Latency (WL) =Read Latency (RL) -1
- Read Latency (RL) = Programmable Additive