Datasheet Details
| Part number | EMP18K03HPCS |
|---|---|
| Manufacturer | Excelliance MOS |
| File Size | 424.47 KB |
| Description | Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Datasheet | EMP18K03HPCS-ExcellianceMOS.pdf |
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Overview: EMP18K03HPCS Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor ▪Product Summary: ▪.
| Part number | EMP18K03HPCS |
|---|---|
| Manufacturer | Excelliance MOS |
| File Size | 424.47 KB |
| Description | Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Datasheet | EMP18K03HPCS-ExcellianceMOS.pdf |
|
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: Q1 Q2 BVDSS 30V 30V RDSON (MAX.)@VGS=10V RDSON (MAX.)@VGS=4.5V ID @TC=25℃ 5.7mΩ 2.0mΩ 8.8mΩ 2.8mΩ 77A 172A ID @TA=25℃ 16A 29A Dual N Channel MOSFET UIS, Rg 100% Tested RoHS & Halogen Free & TSCA Compliant ▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Q1 Q2 Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current1 Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 TC = 25 °C TC = 100 °C TA = 25 °C TA = 70 °C L = 0.01mH L = 0.05mH VGS ±20 ±12 ID 77 172 48 126 ID 16 29 12 23 IDM 136 384 IAS 70 100 EAS 24.5 50 EAR 122.5 250 Power Dissipation Power Dissipation TC = 25 °C TC = 100 °C TA = 25 °C TA = 70 °C PD 54 125 22 50 PD 2.4 2.7 1.5 1.7 Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150 ▪100% UIS testing in condition of VD=25V, L=0.01mH, VG=10V, IL=54A, RG=25Ω,Rated VDS=30V N-CH_Q1 ▪100% UIS testing in condition of VD=25V, L=0.01mH, VG=10V, IL=70A, RG=25Ω,Rated VDS=30V N-CH_Q2 ▪THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM Q1 Q2 Junction-to-Case RθJC 2.3 1.0 Junction-to-Top Steady-State RθJT 42 30 Junction-to-Ambient3 t≦10s RθJA Steady-State RθJA 23 18 53 46 1Pulse width limited by maximum junction temperature.
2Duty cycle < 1％ 3The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz.
Copper, in a still air environment with TA =25°C.
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